Multilayer printed wiring board for semiconductor devices and method for manufacturing the board

Abstract

A coreless multilayer printed wiring board including a coreless layer having an opening, a conductive film formed on an upper surface of the coreless layer and closing one end of the opening of the coreless layer, a via-hole formed in the opening of the coreless layer, a first resin layer formed on the coreless layer and the conductive film and having an opening reaching to the conductive film, a via-hole formed in the opening of the first resin layer, a second resin layer formed on the upper surface of the first resin layer and having an opening, a via-hole formed in the opening of the second resin layer. The via-holes formed in the first and second resin layers are open in the direction opposite to the direction in which the via-hole formed in the coreless layer is open.

Dependencies are inferred from the claim text.