Successive approximation analog to digital converter and method thereof
AssigneeHoltek Semiconductor Inc.
InventorPochin HSU
Life of this patent
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Abstract
The configuration of a successive approximation analog to digital converter (ADC) and a method thereof are provided in the present invention. The proposed configuration includes a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result, a most significant bit ADC coupled to the non-inverting input terminal, and a least significant bit ADC coupled to the inverting input terminal.
Claims14
A successive approximation analog to digital converter, comprising:
- a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result;
- a most significant bit (MSB) capacitor array having a first input terminal receiving a first reference voltage, a second input terminal sampling a signal so as to proceed a first conversion, a third input terminal receiving a second reference voltage, and a second output terminal outputting a first potential value and coupled to one of the inverting input terminal and the non-inverting input terminal;
- and
- a least significant bit (LSB) capacitor array having a fourth input terminal receiving the second reference voltage, a third output terminal outputting a second potential value, coupled to the non-inverting input terminal when the second input terminal is coupled to the inverting input terminal, and coupled to the inverting input terminal when the second input terminal is coupled to the non-inverting input terminal.
A successive approximation analog to digital converter, comprising:
- a comparator having an inverting input terminal, a non-inverting input terminal and an output terminal outputting a comparison result;
- a most significant bit (MSB) array coupled to one of the inverting and the non-inverting input terminals;
- and
- a least significant bit (LSB) array coupled to the other one of the inverting and non-inverting input terminals.
A controlling method for a successive approximation analog to digital converter, comprising the steps of:
- (a) providing a sample of a signal, a most significant bit (MSB) array having (n-m) bits, a least significant bit (LSB) array having m bits and a comparator coupled to the MSB array and the LSB array and outputting a comparison result;
- (b) adjusting a terminal potential value of each of the (n-m) bits of the MSB array according to the comparison result and keeping a terminal potential value of each of the m bits of the LSB array unchanged;
- (c) adjusting a terminal potential value of each of the m bits of the LSB array after an adjustment of each the terminal potential of the MSB array is accomplished and keeping the terminal potential value of each of the (n-m) bits of the MSB array unchanged;
- and
- (d) outputting a digital signal after the adjustment of each the terminal potential of each of the m bits of the LSB array is accomplished.
Dependencies are inferred from the claim text.