Dimmer decoder with low duty cycle handling for use with led drivers

A system comprising:

• a driver configured to generate a drive signal for controlling illumination from one or more light emitting diode (LEDs);
• and
• a dimmer decoder configured to:
• receive a sense signal comprised of multiple pulses, the sense signal based on an output of a dimmer;
• for each of multiple sampling periods:
• identify a pulse duty cycle by sampling at least one pulse in the sense signal during that sampling period and calculating a duty cycle of the at least one pulse;
• and
• generate an output value identifying a duty cycle for driving the one or more LEDs, the output value based on the pulse duty cycle;
• and
• generate a holding current for the dimmer (i) during the sampling of the at least one pulse in at least one of the sampling periods and (ii) when the pulse duty cycle is less than a specified threshold.

An apparatus comprising:

• a digital block configured to:
• receive a sense signal comprised of multiple pulses, the sense signal based on an output of a dimmer;
• for each of multiple sampling periods:
• identify a pulse duty cycle by sampling at least one pulse in the sense signal during that sampling period and calculating a duty cycle of the at least one pulse;
• and
• generate an output value identifying a duty cycle for driving one or more light emitting diodes (LEDs), the output value based on the pulse duty cycle;
• and
• a dynamic hold current generation circuit configured to generate a holding current for the dimmer (i) during the sampling of the at least one pulse in at least one of the sampling periods and (ii) when the pulse duty cycle is less than a specified threshold.