Packaged semiconductor assemblies and methods for manufacturing such assemblies
AssigneeMicron Technology, Inc.
InventorsBoon Suan Jeung, Eng Meow Koon, Chia Yong Poo
Life of this patent
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Abstract
Packaged semiconductor assemblies including interconnect structures and methods for forming such interconnect structures are disclosed herein. One embodiment of a packaged semiconductor assembly includes a support member having a first bond-site and a die carried by the support member having a second bond-site. An interconnect structure is connected between the first and second bond-sites and includes a wire that is coupled to at least one of the first and second bond-sites. The interconnect structure also includes a third bond-site coupled to the wire between the first and second bond-sites.
Claims23
A semiconductor assembly comprising:
- a support member having a first bond-site;
- a die attached to the support member and having a second bond-site;
- an interconnect structure connected between the first and second bond-sites, wherein the interconnect structure includes a material discontinuity spaced apart from and between the first and second bond-sites;
- and
- a third bond-site at an exterior surface of the assembly coupled to the interconnect structure between the first and second bond-sites.
A semiconductor assembly, comprising:
- a support member having a first bond-site and a conductive pedestal connected to and projecting from the first bond-site;
- a die attached to the support member and having a second bond-site;
- an encapsulant disposed around at least a portion of the pedestal and at least a portion of the die;
- a redistribution structure connected to the pedestal and to the second bond-site, the redistribution structure having a third bond-site accessible from outside the encapsulant.
A stacked semiconductor assembly, comprising:
- a first package including a first die and a first bond-site at a periphery of the first package and electrically connected to the die, wherein the first package has a first footprint and the first bond-site has a first width transverse to the periphery of the first die;
- a second package carried by the first package and including a second die generally identical to the first die, and a second bond-site at a periphery of the second package and electrically connected to the second die, wherein the second package has a second footprint smaller than the first footprint and the second bond-site has a second width transverse to the periphery of the second die, the second width being smaller than the first width;
- an interconnect structure connected between the first and second bond-sites;
- and
- an encapsulant disposed at least partially around the interconnect structure and the first and second bond-sites.
A method of forming a semiconductor assembly, comprising:
- forming a conductive pedestal at a first bond-site of a support member, wherein the pedestal has a surface spaced apart from the support member;
- attaching the support member to a die having a second bond-site;
- disposing an encapsulant adjacent to the pedestal;
- removing at least a portion of the encapsulant to at least partially expose the surface of the pedestal;
- and
- forming a redistribution structure connected to the surface of the pedestal and the first bond-site and having a third bond-site between the first and second bond-sites and spaced apart from the die.
A method of forming a stacked semiconductor assembly, comprising:
- singulating a first semiconductor assembly having a first die and a first bond-site at a periphery of the first assembly, the first assembly having a first footprint;
- singulating a second semiconductor assembly along a singulation line, the second semiconductor assembly having a second die generally identical to the first die and a second bond-site that is at a periphery of the second assembly and is intersected by the singulation line, the second assembly having a second footprint that is smaller than the first footprint;
- attaching the first assembly to the second assembly;
- connecting the first bond-site to the second bond-site with an interconnect structure;
- and
- encasing at least a portion of the interconnect structure and the bond-sites of the first and second assemblies with an encapsulant.
Dependencies are inferred from the claim text.