High voltage devices, systems, and methods for forming the high voltage devices

A high voltage (HV) device comprising:

• a gate dielectric structure over a substrate, the gate dielectric structure having a first portion and a second portion, the first portion having a first thickness and being over a first well region of a first dopant type in the substrate, the second portion having a second thickness and being over a second well region of a second dopant type, the first thickness being larger than the second thickness;
• a gate electrode disposed over the gate dielectric structure;
• at least one source/drain (S/D) region disposed within the first well region of the first dopant type;
• and
• a metallic layer coupled with the at least one S/D region, the metallic layer extending along a direction of a channel under the gate dielectric structure.

A method for forming a high voltage (HV) device, the method comprising:

• forming a gate dielectric structure over a substrate, the gate dielectric structure having a first portion and a second portion, the first portion having a first thickness and being over a first well region of a first dopant type in the substrate, the second portion having a second thickness and being over a second well region of a second dopant type, the first thickness being larger than the second thickness;
• forming a gate electrode over the gate dielectric structure;
• forming at least one source/drain (S/D) region within the first well region of the first dopant type;
• forming a metallic layer coupled with the gate electrode or the at least one S/D region, the metallic layer extending along a direction of a channel under the gate dielectric structure.