Optoelectronic devices with laminate leadless carrier packaging in side-looker or top-looker device orientation

A laminate leadless carrier package comprising:

• an optoelectronic chip;
• a substrate supporting the optoelectronic chip, the substrate comprising a plurality of conductive and dielectric layers laminated together;
• a wire bond pad positioned on the top surface of the substrate;
• a wire bond coupled to the optoelectronic chip and the wire bond pad;
• an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate, wherein the encapsulation is a molding compound;
• and
• wherein the laminate leadless carrier package is arranged to be mounted in a side-looker configuration on a printed circuit board, wherein the active area of the optoelectronic chip is perpendicular to the printed circuit board, or in a top-looker configuration on a printed circuit board, wherein the active area of the optoelectronic chip is parallel to the printed circuit board.

A process for manufacturing a plurality of laminate leadless carrier packages, comprising:

• preparing a substrate, wherein preparing the substrate comprises laminating a top conductive layer, a bottom conductive layer, and a dielectric layer between the top and bottom conductive layers together, and wherein the top conductive layer comprises a die attach pad, a wire bond pad, and two slotted vias;
• applying epoxy adhesive to the die attach pad;
• mounting an optoelectronic chip on the die attach pad;
• wire-bonding the optoelectronic chip with the wire bond pad using a wire bond;
• molding a molding compound to form an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate;
• and
• dicing the substrate into individual laminate leadless carrier packages.

A laminate leadless carrier package comprising:

• an optoelectronic chip;
• a substrate supporting the optoelectronic chip, the substrate comprising a plurality of conductive and dielectric layers laminated together, wherein the active area of the optoelectronic chip is facing a bottom surface of the substrate, and wherein the substrate comprises a hole to allow light to reach to and from the active area of the optoelectronic chip;
• an encapsulation covering the optoelectronic chip and at least a portion of the bottom surface of the substrate, wherein the encapsulation is a molding compound;
• and
• wherein the laminate leadless carrier package is arranged to be mounted in a side-looker configuration on a printed circuit board, wherein the active area of the optoelectronic chip is perpendicular to the printed circuit board.