Semiconductor device having wireless communication function

Abstract

A semiconductor device includes a memory portion, a logic portion, and a plurality of signal lines for electrically connecting the memory portion and the logic portion. In the case where a transfer rate between the semiconductor device and a communication device is α [bps], a first clock frequency generated in the logic portion is Kα [Hz] (K is an integer of 1 or more), the number of reading signal lines of the plurality of signal lines is n (n is an integer of 2 or more), and a second clock frequency generated in the logic portion is Lα/n [Hz] (L is any integer satisfying L/n<K), data stored in the memory portion is read to the logic portion through the n reading signal lines with use of the second clock frequency Lα/n [Hz].

Dependencies are inferred from the claim text.