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US 2011/0035575 A1Published application
Multiprocessor system comprising multi-port semiconductor memory device
AssigneeSamsung Electronics Co., Ltd.
InventorJin-Hyoung KWON
Life of this patent
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Abstract
A multiprocessor system comprises first and second processors connected to a multi-port semiconductor memory device. The multi-port semiconductor memory device comprises a shared memory area and a plurality of mailbox areas used for inter-processor communication. The first and second processors use a single nonvolatile memory device for storing boot data and transmit information for booting via the shared memory area.
Claims20
A multiprocessor system comprising:
- a multi-port semiconductor memory device comprising a shared memory area and a plurality of mailbox areas used for inter-processor communication;
- a first processor connected to the multi-port semiconductor memory device and comprising an internal read only memory (ROM) storing default initialization codes for initializing a dynamic random access memory (DRAM) controller in a booting operation of the first processor;
- a second processor connected to the multi-port semiconductor memory device and performing communication with the first processor through the multi-port semiconductor memory device;
- and
- a non-volatile semiconductor memory device connected to the second processor and storing user data, software, and boot loaders for the first and second processors.
2 more elements
A multiprocessor system comprising:
- a first multi-port semiconductor memory device;
- first and second processors connected to the first multi-port semiconductor device, the first and second processors having common access to the first multi-port semiconductor device;
- and
- a memory link architecture block comprising:
- a second multi-port semiconductor memory device connected to the second processor;
- a non-volatile semiconductor memory device;
- and
- a third processor connected to the second multi-port semiconductor memory device and the non-volatile semiconductor memory device, the third processor controlling booting of the first and second processors by transferring boot data from the non-volatile semiconductor memory device to the first and second processors.
5 more elements
A method of operating a multiprocessor system, comprising:
- operating a first processor to execute a primary boot loader stored in a read only memory (ROM) coupled to the first processor;
- operating a second processor to execute a primary boot loader stored in a ROM coupled to the second processor;
- operating the second processor to read a second boot loader of the second processor from a nonvolatile memory, and to execute the second boot loader of the second processor to read operating system (OS) image data for the second processor from the nonvolatile memory;
- operating the second processor to read a second boot loader of the first processor and OS image data for the first processor from the nonvolatile memory, and to store the second boot loader of the first processor and the OS image data for the first processor in a shared memory area in a multi-port semiconductor memory device;
- and
- operating the first processor to read the secondary boot loader of the first processor and the OS image data for the first processor from the shared memory area, and to execute the second boot loader of the first processor.
3 more elements
Dependencies are inferred from the claim text.