Store queue with token to facilitate efficient thread synchronization

A processor with a store queue, comprising:

• the processor;
• the store queue within the processor;
• and
• an unacknowledged counter within the store queue that keeps track of the number of store operations that have been sent from the store queue to a memory system but have not been acknowledged as being committed to the memory system;
• wherein when a membar token is at the head of the store queue, the store queue is configured to,
• examine the unacknowledged counter,
• if the unacknowledged counter is non-zero, wait until the unacknowledged counter equals zero, and
• remove the membar token from the store queue.

A computer system containing a processor with a store queue, comprising:

• the processor;
• the store queue within the processor;
• a memory system coupled to the store queue;
• and
• an unacknowledged counter within the store queue that keeps track of the number of store operations that have been sent from the store queue to a memory system but have not been acknowledged as being committed to the memory system;
• wherein when a membar token is at the head of the store queue, the store queue is configured to,
• examine the unacknowledged counter,
• if the unacknowledged counter is non-zero, wait until the unacknowledged counter equals zero, and
• remove the membar token from the store queue.