Bitstream Buffer Manipulation with a SIMD Merge Instruction
AssigneeIntel Corporation
InventorsYen-Kuang Chen, William W. Macy, JR., Matthew Holliman, Eric L. Debes, Minerva M. Yeung
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Abstract
Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
Claims21
A method comprising:
- determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block;
- and
- performing a shift merge operation to merge said unprocessed data bits from said first data block with a second data block, wherein a merged data block is formed.
An apparatus comprising:
- an execution unit to execute a plurality of instructions for a variable length decoding algorithm, wherein one of said instructions is a first instruction for a shift merge operation, said plurality of instructions to cause said execution unit to:
- determine whether any unprocessed data bits for a partial variable length symbol exist in a first data block;
- and
- perform a shift merge operation to merge said unprocessed data bits from said first data block with a second data block, wherein a merged data block is formed.
21-39. (canceled)
Dependencies are inferred from the claim text.