Layered Modeling for High-Level Synthesis of Electronic Designs
OwnerMaxim Smirnov, Andres Takachinventors
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Abstract
Methods and apparatuses for modeling and simulating a high-level circuit design are provided. With some implementations of the invention, a layered model corresponding to an algorithmic description for a circuit design is generated. The layered model includes a set of threads that describe the behavior of the circuit design, a schedule that describes timing constraints of the circuit design, and interfaces that facilitate the transfer of data between various layered models. With some implementations, a layered model may also include a shared variable that facilitates the transfer of data between ones of the set of threads within a layered model.
Claims19
A circuit design simulation tool for simulating an output of at least a portion of a circuit design, the tool comprising:
- a target interface module that receives an input;
- a component module that matches the input to a user defined thread, the user defined thread corresponding to a portion of the circuit design;
- a thread execution module that generates an output from the input by causing the user defined thread to be executed by a computing device;
- and
- an initiator interface module that transmits the output;
- whereby at least a portion of the circuit design may be simulated.
A computer implemented method for generating a model of an electronic design, the method comprising:
- receiving a specification that functionally describes at least a portion of a circuit design;
- generating a set of threads from the specification;
- receiving a set of design constraints;
- generating a schedule from the set of design constraints and the specification;
- generating a layered model that is functionally equivalent to the portion of the circuit design from the schedule and the set of threads;
- and
- saving the layered model to a memory storage device.
A computer program product for generating a model of an electronic design comprising:
- software instructions that cause a computer to perform a set of operations;
- and
- one or more computer readable media storing the software instructions;
- the set of operations including:
- receiving a specification that functionally describes at least a portion of a circuit design;
- generating a set of threads from the specification;
- receiving a set of design constraints;
- generating a schedule from the set of design constraints and the specification;
- generating a layered model that is functionally equivalent to the portion of the circuit design from the schedule and the set of threads;
- and
- saving the layered model to a memory storage device.
Dependencies are inferred from the claim text.