US 2011/0033022 A1 · DIGITAL LOGIC CIRCUIT, SHIFT REGISTER AND ACTIVE MATRIX DEVICE

Abstract

A digital logic circuit includes a plurality of transistors of a same conduction type. In at least one embodiment, a first transistor has a source, gate and drain connected to a first circuit node, a second circuit node and a first power supply line, respectively. A second transistor has a source, gate and drain connected to the second node, the first node and the first supply line, respectively. A third transistor has a drain connected to the first node. A fourth transistor has a gate and drain connected to a third circuit node and the second circuit node, respectively. A fifth transistor has a gate and drain connected to the first and third nodes, respectively. Such a circuit may be used, for example, as a latch in a shift register of an active matrix addressing arrangement.

Claims40

Dependent claims

A digital logic circuit comprising a plurality of transistors of a same conduction type, the plurality of transistors comprising:

a first transistor whose source, gate and drain are connected to a first circuit node, a second circuit node and a first power supply line, respectively;
a second transistor whose source, gate and drain are connected to the second node, the first node and the first supply line, respectively;
a third transistor whose drain is connected to the first node;
a fourth transistor whose gate and drain are connected to a third circuit node and the second node, respectively;
and a fifth transistor whose gate is connected to the first or second node and whose drain is connected to the third node.

2 more elements

Dependencies are inferred from the claim text.

Digital logic circuit, shift register and active matrix device

Life of this patent

Digital logic circuit, shift register and active matrix device

Life of this patent

Abstract

Claims40