Using dual hdvicp coprocessor to accelerate dm6467 h.264 decoder
AssigneePolycom, Inc.
InventorKui Zhang
Life of this patent
Estimating the term…
Abstract
Systems and methods are disclosed for utilizing multiple co-processors, of a multiprocessor processing device, in tandem to improve performance for H.264 video decoding operations. The video decoding operation may be split across the multiple High Definition Video Image Co-Processors (HDVICPs) of a multiprocessor device such as Texas Instrument's DM6467 utilizing a spatially shifted temporal split to improve overall performance of the video decoding operation while conforming to the H.264 standard.
Claims30
A method of decoding video data on a programmable processing device with a plurality of video image coprocessors, the method comprising:
- receiving video data from an input source;
- decoding a first top portion of a first even numbered frame on a first video image coprocessor;
- decoding a first bottom portion of a first even numbered frame on the first video image coprocessor;
- decoding a first top portion of a first odd numbered frame on a second video image coprocessor;
- wherein the first bottom portion of the first even numbered frame is decoded concurrently with the first top portion of the first odd numbered frame;
- and
- providing a result decoded image to a display device.
A method of decoding video data on a programmable processing device with a plurality of video image coprocessors, the method comprising:
- decoding a first quadrant of a first even numbered frame on a first video image coprocessor;
- decoding a first quadrant of a first odd numbered frame on a second video image coprocessor;
- decoding a first quadrant of a second even numbered frame on a third video image coprocessor;
- decoding a first quadrant of a second odd numbered frame on a fourth video image coprocessor;
- wherein the first quadrant of the first odd numbered frame is decoded concurrently with the second quadrant of the first even numbered frame;
- the first quadrant of a second even numbered frame is decoded concurrently with second quadrant of first odd numbered frame and third quadrant of first even numbered frame;
- the first quadrant of a second odd numbered frame is decoded currently with the second quadrant of second even numbered frame and third quadrant of first odd numbered frame and fourth quadrant of first even numbered frame.
A video decoding device comprising:
- a programmable processing device communicatively coupled to a display device;
- a network interface;
- and
- a memory;
- wherein the programmable processing device is configured to perform the method of the method comprising:
- receiving video data from an input source;
- decoding a first top portion of a first even numbered frame on a first video image coprocessor;
- decoding a first bottom portion of a first even numbered frame on the first video image coprocessor;
- decoding a first top portion of a first odd numbered frame on a second video image coprocessor;
- wherein the first bottom portion of the first even numbered frame is decoded concurrently with the first top portion of the first odd numbered frame;
- and
- providing a result decoded image to a display device.
A video decoding device comprising:
- a programmable processing device communicatively coupled to a display device;
- a network interface;
- and
- a memory;
- wherein the programmable processing device is configured to perform the method of the method comprising:
- decoding a first quadrant of a first even numbered frame on a first video image coprocessor;
- decoding a first quadrant of a first odd numbered frame on a second video image coprocessor;
- decoding a first quadrant of a second even numbered frame on a third video image coprocessor;
- decoding a first quadrant of a second odd numbered frame on a fourth video image coprocessor;
- wherein the first quadrant of the first odd numbered frame is decoded concurrently with the second quadrant of the first even numbered frame;
- the first quadrant of a second even numbered frame is decoded concurrently with second quadrant of first odd numbered frame and third quadrant of first even numbered frame;
- the first quadrant of a second odd numbered frame is decoded currently with the second quadrant of second even numbered frame and third quadrant of first odd numbered frame and fourth quadrant of first even numbered frame.
A program storage device with instructions for a programmable control device stored thereon to cause a programmable processing device with a plurality of video image coprocessors to perform a method of decoding video data, the method comprising:
- receiving video data from an input source;
- decoding a first top portion of a first even numbered frame on a first video image coprocessor;
- decoding a first bottom portion of a first even numbered frame on the first video image coprocessor;
- decoding a first top portion of a first odd numbered frame on a second video image coprocessor;
- wherein the first bottom portion of the first even numbered frame is decoded concurrently with the first top portion of the first odd numbered frame;
- and
- providing a result decoded image to a display device.
Dependencies are inferred from the claim text.