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US 2011/0032775 A1Published application
Memory devices and method for driving a signal line to a known signal level
AssigneeMicron Technology, Inc.
InventorSimon J. Lovett
Life of this patent
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Abstract
A system and method for erasing a block of data in a plurality of memory cells includes clamping one of a digit line and an I/O line in a sensing circuit of a memory device to a fixed logic level. The memory cells of the block of memory cells are selected and refreshed to the fixed logic level. A sense amplifier includes a clamping circuit adapted to connect one of a digit line and an I/O line to a fixed logic level in response to an erase signal during a refresh of the selected block of memory cells.
Claims29
A memory device, comprising:
- a memory cell;
- a digit line coupled to the memory cell;
- a sense amplifier coupled to the digit line;
- and
- a circuit coupled to the digit line, wherein the circuit is configured to drive the digit line to a known signal level during an access of the memory cell.
2 more elements
A memory device comprising:
- control logic;
- a memory cell;
- a digit line coupled to the memory cell;
- an I/O line configured to be selectively coupled to the digit line;
- and
- a circuit coupled to the I/O line, wherein the circuit is configured to drive the I/O line to a known signal level responsive to a signal from the control logic.
3 more elements
A memory device, comprising:
- a memory bit;
- a signal line coupled to the memory bit;
- a circuit coupled to a signal line, wherein the circuit is configured to drive a voltage of a known signal level on the signal line and save the voltage to the memory bit following an access of the memory bit.
A method, comprising:
- driving a signal line to a known signal level in response to an erase signal;
- causing the known signal level to be saved into a memory cell during an access of the memory cell.
Dependencies are inferred from the claim text.