Semiconductor integrated circuit for displaying image
AssigneeKabushiki Kaisha Toshiba
InventorsToshiyuki Furusawa, Hitoshi Nemoto, Isao Ooigawa, Nariyuki Fukuda, Hiroyuki Fujioka, Noriyuki Moriyasu
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AssigneeKabushiki Kaisha Toshiba
InventorsToshiyuki Furusawa, Hitoshi Nemoto, Isao Ooigawa, Nariyuki Fukuda, Hiroyuki Fujioka, Noriyuki Moriyasu
Estimating the term…
A normal bus and an extension bus having the same bit width as the normal bus are provided. A line buffer has a plurality of line regions to store pixel data of input image data. A line buffer writing control portion controls a direction in which the pixel data is to be written to the line buffer. A line buffer reading control portion reads out the pixel data stored in the line buffer and to output the read out pixel data to the buses selectively. A frame memory writing control portion controls a destination in a frame memory to which the pixel data obtained from the buses is to be written. An address control portion controls a writing address in the frame memory. The line buffer writing control portion controls the writing direction in the line buffer in accordance with an image rotation command signal.
A semiconductor integrated circuit comprising:
Dependencies are inferred from the claim text.