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US 2011/0032131 A1Published application
Analog To Digital Converter with Dynamic Power Configuration
AssigneeBroadcom Corporation
InventorChun-Ying CHEN
Life of this patent
Estimating the term…
Abstract
In an embodiment, an analog to digital converter (ADC) has a dynamic power circuit. The ADC has a track-and-hold circuit with an output and a track mode. The ADC also has a comparator with an input. A preamplifier is coupled between the track-and-hold output and the comparator input. At least one of a preamplifier current and a comparator current are limited during the track mode to reduce ADC power consumption.
Claims22
An analog to digital converter (ADC), comprising:
- a track-and-hold circuit configured to provide a track-and-hold output based on a signal received at an input of the ADC and based on whether the track-and-hold circuit is operating in a track mode or a hold mode;
- a comparator configured to provide a comparator output based on the track-and-hold output, the comparator comprising a first pair of cross-coupled transistors, a second pair of cross-coupled transistors, and a differential pair of transistors;
- and
- a dynamic power circuit configured to selectively turn on and off the first pair of cross-coupled transistors, the second pair of cross-coupled transistors, and the differential pair of transistors based on whether the track-and-hold circuit is operating in a first or second phase of time associated with the track mode, or in a third or fourth phase of time associated with the hold mode,
- wherein the first phase occurs before the second phase, and the third phase occurs before the fourth phase.
2 more elements
A method for controlling an analog to digital converter (ADC), comprising:
- providing a track-and-hold output based on a signal received at an input of the ADC and based on whether the ADC is operating in a track mode or a hold mode;
- providing a comparator output, based on the track-and-hold output, using a comparator that comprises a first pair of cross-coupled transistors, a second pair of cross-coupled transistors, and a differential pair of transistors;
- and
- selectively turning on and off the first pair of cross-coupled transistors, the second pair of cross-coupled transistors, and the differential pair of transistors based on whether the ADC is operating in a first or second phase of time associated with the track mode, or in a third or fourth phase of time associated with the hold mode,
- wherein the first phase occurs before the second phase, and the third phase occurs before the fourth phase.
2 more elements
An analog to digital converter (ADC), comprising:
- a track-and-hold circuit configured to provide a track-and-hold output based on a signal received at an input of the ADC and based on whether the track-and-hold circuit is operating in a track mode or a hold mode;
- a comparator configured to provide a comparator output based on the track-and-hold output, the comparator comprising a comparator core and a comparator amplifier;
- and
- a dynamic power circuit configured to selectively turn on and off the comparator core and the comparator amplifier based on whether the track-and-hold circuit is operating in a first or second phase of time associated with the track mode, or in a third or fourth phase of time associated with the hold mode,
- wherein the first phase occurs before the second phase, and the third phase occurs before the fourth phase.
2 more elements
Dependencies are inferred from the claim text.