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US 2011/0032028 A1Published application
Voltage variation reducing circuit and semiconductor device using the same
AssigneeRenesas Electronics Corporation
InventorHidenari NAKASHIMA
Life of this patent
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Abstract
A voltage variation reducing circuit includes a first transistor and a second transistor. The first transistor is connected to a first power source line of a first power source voltage at a source and a second power source line of a second power source voltage at a drain and a gate. The second transistor is connected to a third power source line of a third power source voltage higher than the second power source voltage at a source and the second power source line at a drain gate.
Claims12
A voltage variation reducing circuit comprising:
- a first transistor configured to be connected to a first power source line of a first power source voltage at a source and a second power source line of a second power source voltage at a drain and a gate;
- and
- a second transistor configured to be connected to a third power source line of a third power source voltage higher than said second power source voltage at a source and said second power source line at a drain gate.
A semiconductor device comprising:
- a voltage variation reducing circuit configured to include:
- a first transistor configured to be connected to a first power source line of a first power source voltage at a source and a second power source line of a second power source voltage at a drain and a gate, and
- a second transistor configured to be connected to a third power source line of a third power source voltage higher than said second power source voltage at a source and said second power source line at a drain gate;
- and
- a load circuit configured to be operated by being supplied with said first power source voltage and said second power source voltage.
2 more elements
Dependencies are inferred from the claim text.