Switched bandgap reference circuit for retention mode

An integrated circuit comprising:

• a bandgap reference circuit that generates a reference voltage, coupled to a storage capacitor through a switch;
• a logic having a bandgap enable signal that controls the bandgap reference circuit and a refresh enable signal that controls the switch, such that:
• during an active mode the bandgap reference circuit is active in response to the bandgap enable signal and the switch is active in response to the refresh enable signal;
• and
• during a retention mode the bandgap reference circuit and the switch are active for a first time interval in response to the bandgap enable signal and the refresh enable signal respectively and then the switch and the bandgap reference circuit are inactive for a second time interval in response to the refresh enable signal and the bandgap enable signal respectively that decouples the bandgap reference circuit from the storage capacitor, thereby using the charge stored in the storage capacitor to generate a reference voltage;
• and
• a regulator coupled to the storage capacitor that receives the reference voltage.

A method of operating a bandgap reference circuit, the method comprising:

• coupling the bandgap reference circuit to a storage capacitor during an active mode;
• coupling the bandgap reference circuit to the storage capacitor for a first time interval during a retention mode;
• decoupling the bandgap reference circuit from the storage capacitor for a second time interval;
• and
• using the charge stored in the storage capacitor for generating the reference voltage for the regulator during the retention mode.