Delay locked loop circuit and signal delay method
AssigneeNEC Electronics Corporation
InventorsMasahiko Shihara, Atsushi Tangoda
Life of this patent
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Abstract
A multiplier PLL multiplies a reference clock and outputs the multiplied clock. A DLL compares the clock output from the multiplier PLL with a clock obtained by delaying the clock output from the multiplier PLL. The DLL generates a delay signal having a given amount of delay based on the comparison result. A delay control signal operation circuit generates a delay control signal based on the delay signal generated by the DLL. A first delay circuit delays an input signal based on the delay control signal generated by the delay control signal operation circuit.
Claims8
A delay locked loop circuit comprising:
- a multiplier PLL (Phase Lock Loop) that multiplies a reference clock and outputs the multiplied reference clock;
- a DLL (Delay Locked Loop) that applies an amount of delay corresponding to a given cycle to the clock output from the multiplier PLL to generate a delay signal having a given amount of delay so that the delay signal has the same phase as the clock output from the multiplier PLL;
- a delay control signal operation circuit that generates a delay control signal having a given amount of delay based on the delay signal having the given amount of delay;
- and
- a first delay circuit that delays an input signal based on the delay control signal.
A signal delay method comprising:
- multiplying a reference clock by a multiplier PLL and applying an amount of delay corresponding to a given cycle of the multiplied clock output from the multiplier PLL so that a delayed signal has the same phase as the clock multiplied by the multiplier PLL;
- generating a delay signal having a given amount of delay based on the amount of delay corresponding to the given cycle of the multiplied clock;
- generating a delay control signal based on the delay signal having the given amount of delay;
- and
- delaying an input signal based on the delay control signal.
Dependencies are inferred from the claim text.