# US 2011/0031632 A1 · Die stacking with an annular via having a recessed socket

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- Number: US 2011/0031632 A1
- Document ID: US20110031632A1
- Status: Published application
- Kind: A1
- Application number: 12/905,708
- Filed: 2010-10-15
- Published: 2011-02-10
- Earliest claimed: 2008-04-22
- Assignees: Micron Technology, Inc.
- Inventors: Dave Pratt
- Web page: https://patentgrep.com/patent/US20110031632A1

## CPC

- H10W 90/00: Package configurations
- H10W 20/023: {the interconnections being through-semiconductor vias}
- H10W 20/0245: {comprising use of blind vias during the manufacture}
- H10W 20/20: Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
- H10W 20/2125: {Top-view shapes}
- H10W 72/019: {of bond pads}
- H10W 72/01255: {by using masks}
- H10W 72/072: {of bump connectors}
- H10W 72/07227: {involving guiding structures, e.g. spacers or supporting members}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/251: {Materials}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/942: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 90/297: {characterised by the through-semiconductor vias [TSVs] in the stacked chips}
- H10W 90/722: {between stacked chips}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A die stack including a die having an annular via with a recessed conductive socket and methods of forming the die stack provide a structure for use in a variety of electronic systems. In an embodiment, a die stack includes a conductive pillar on the top of a die inserted into the recessed conductive socket of another die.

## Claims

### Claim 1

An apparatus comprising:
an annular through-substrate via (TSV) with a planar end portion covering a portion of a first surface of a substrate and with portions of the annular TSV exposed at a second surface of the substrate;
a nonconductive layer covering portions of the second surface surrounding the annular TSV and leaving a recessed portion inside the annular TSV at the second surface uncovered by the nonconductive layer; and
an under bump layer on the recessed portion forming a conductive socket on the second surface.

### Claim 2 (depends on 1)

The apparatus of claim 1, further comprising a second substrate, the second substrate including a conductive cylindrical pillar, wherein the substrate with the annular TSV is a first substrate, and the conductive cylindrical pillar is fitted into the conductive socket of the first substrate.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the second substrate includes:
a first surface and a second surface, wherein the conductive cylindrical pillar is on the second surface;
an additional annular TSV with a planar end portion covering a portion of the first surface of the second substrate and with portions of the annular TSV exposed at the second surface of the second substrate;
an additional nonconductive layer covering portions of the second surface of the second substrate, surrounding the additional annular TSV and leaving an additional recessed portion inside the additional annular TSV at the second surface of the second substrate uncovered by the additional nonconductive layer; and
an additional under bump layer on the additional recessed portion forming an additional conductive socket on the second surface of the second substrate.

### Claim 4 (depends on 3)

The apparatus of claim 3, further comprising a third substrate including an additional conductive cylindrical pillar fitted into the additional conductive socket of the second substrate.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein the first surface is an active surface of the substrate.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein the substrate is included in a die, the die including an electronic device at the first surface.

### Claim 7

A method comprising:
forming an annular through-substrate via (TSV) with a planar end portion covering a portion of a first surface of a substrate and with portions of the annular TSV exposed at a second surface of the substrate;
forming a nonconductive layer covering portions of the second surface of the substrate surrounding the annular TSV and leaving a recessed portion inside the annular TSV at the second surface uncovered by the nonconductive layer; and
depositing an under bump layer on the recessed portion forming a conductive socket on the second surface of the substrate.

### Claim 8 (depends on 7)

The method of claim 7, further comprising:
forming a conductive cylindrical pillar on a surface of a second substrate, wherein the substrate with the annular TSV is a first substrate, and the conductive cylindrical pillar is sized to fit into the conductive socket of the first substrate.

### Claim 9 (depends on 8)

The method of claim 8, further comprising:
forming a stack from the first substrate and the second substrate, such that the conductive cylindrical pillar of the second substrate is fitted into the conductive socket of the first substrate to form a conductive connection between the conductive cylindrical pillar of the second substrate and the conductive socket of the first substrate.

### Claim 10 (depends on 9)

The method of claim 9, further comprising:
disposing a third substrate over the stack of the first substrate and the second substrate, such that a metal pillar of the third substrate is disposed in a conductive socket in an annular via of the second substrate to form a conductive connection between the metal pillar and the conductive socket of the second substrate.

### Claim 11 (depends on 9)

The method of claim 9, further comprising:
disposing a conductive cylindrical pillar of at least one additional substrate in a conductive socket in an annular via of the second substrate.

### Claim 12 (depends on 7)

The method of claim 7, further comprising:
forming an additional annular TSV with a planar end portion covering a portion of a first surface of a second substrate and with portions of the additional annular TSV exposed at a second surface of the second substrate;
forming a additional nonconductive layer covering portions of the second surface of the second substrate surrounding the additional annular TSV and leaving an additional recessed portion inside the additional annular TSV at the second surface of the second substrate uncovered by the additional nonconductive layer;
depositing an additional under bump layer on the additional recessed portion forming an additional conductive socket on the second surface of the second substrate; and
forming a conductive cylindrical pillar on the first surface of a second substrate.

### Claim 13 (depends on 12)

The method of claim 12, further comprising:
forming a stack from the first substrate and the second substrate, such that the conductive cylindrical pillar of the second substrate is fitted into the conductive socket of the first substrate.

### Claim 14 (depends on 13)

The method of claim 13, wherein the first substrate is included in a first die, the second substrate is included in a second die, and at least one of the first and second die includes an electronic device.

### Claim 15

A method comprising:
etching a first surface of the substrate to form an annular opening;
forming a first passivation layer over sidewalls of the annular opening;
filling the annular opening with a first conductive material, such that a metal via is formed, the metal via including a planar end portion covering a portion of the first surface of the substrate and extending on the first surface outward from outer edges of the annular opening;
removing a substrate material from a second surface of the substrate including an area surrounded by the metal via, such that a portion of the metal via extends out from the second surface of the substrate;
removing at least a portion of the first passivation layer from inner walls and an inner portion of exposed ends of the metal via at the second surface of the substrate;
forming a second passivation layer over a portion of the second surface of the substrate surrounding the inner portion of the exposed ends of the metal via, such that a recessed area surrounded by inner walls of the metal via is formed; and
coating a layer of a second conductive material on the recessed area to form a conductive socket.

### Claim 16 (depends on 15)

The method of claim 15, further comprising:
forming a conductive cylindrical pillar vertically extending out from the first surface of the substrate and being sized to fit into the conductive socket.

### Claim 17 (depends on 16)

The method of claim 16, wherein the conductive cylindrical pillar is formed on the planar end portion of the metal via.

### Claim 18 (depends on 15)

The method of claim 15, wherein etching the first surface of the substrate is performed over an area of the first surface of the substrate coated with a conductive pad, wherein the annular opening is concentric with the conductive pad.

### Claim 19 (depends on 15)

The method of claim 15, wherein forming the first passivation layer over sidewalls of the annular opening includes forming a passivation material over entire surfaces of the annular opening, and removing a portion of the passivation material from a bottom surface of the annular opening.

### Claim 20 (depends on 15)

The method of claim 15, wherein the first conductive material includes copper, the second conductive material includes an under bump material, and the substrate material includes silicon.