Semiconductor package having through electrodes that reduce leakage current and method for manufacturing the same
AssigneeHynix Semiconductor Inc.
InventorsSeung Hee JO, Sung Cheol KIM, Sung Min KIM
Life of this patent
Estimating the term…
Loading patent…
AssigneeHynix Semiconductor Inc.
InventorsSeung Hee JO, Sung Cheol KIM, Sung Min KIM
Estimating the term…
A stacked semiconductor package having through electrodes that exhibit a reduced leakage current and a method of making the same are presented. The stacked semiconductor package includes a semiconductor chip, through-holes, and a current leakage prevention layer. The semiconductor chip has opposing first and second surfaces. The through-holes pass entirely through the semiconductor chip and are exposed at the first and second surfaces. A polarized part is formed on at least one of the first and second surfaces of the semiconductor chip. The through-electrodes are disposed within the through-holes. The current leakage prevention layer covers the polarized part and exposes ends of the through-electrodes.
A semiconductor package comprising:
A method for manufacturing a semiconductor package, the method comprising:
Dependencies are inferred from the claim text.