Semiconductor memory device and manufacturing method of semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsMasaki Kondo, Kazuaki Isobe
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AssigneeKabushiki Kaisha Toshiba
InventorsMasaki Kondo, Kazuaki Isobe
Estimating the term…
A memory includes active areas and an isolation on a semiconductor substrate. A tunnel dielectric film is on active areas. Floating gates include lower gate parts and upper gate parts. An upper gate part has a larger width than that of a lower gate part on a cross section perpendicular to an extension direction of an active area, and is provided on the lower gate part. An intermediate dielectric film is on an upper surface and a side surface of each floating gate. The control gate is on an upper surface and a side surface of each floating gate via the intermediate dielectric film. A height of a lower end of each control gate from a surface of the semiconductor substrate is lower than a height of an interface between the upper gate part and the lower gate part from the surface of the semiconductor substrate.
A semiconductor memory device comprising:
A manufacturing method of a semiconductor memory device, comprising:
Dependencies are inferred from the claim text.