System and method for generating flat layout
AssigneeCadence Design Systems, Inc.
InventorARNOLD GINETTI
Life of this patent
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Abstract
The present invention provides a method for generating flat layout design view that comprises importing port definitions of a first hierarchical block of digital instances from a source as a schematic symbol, importing port definitions of digital instances within the first hierarchical block from the source, instantiating the schematic symbol as a hierarchical layout instance in the flat layout, binding the hierarchical layout instance to the schematic symbol, and embedding digital layout block instances within the design layout by replacing the digital instances of a digital layout block with digital layout instances of a top layout module of the design layout.
Claims21
A method for generating a design layout comprising:
- generating the design layout by instantiating and interconnecting layout blocks within the design layout;
- binding digital instances within the design layout to instances within a design schematic;
- and
- embedding digital layout block instances within the design layout by replacing the digital instances of a digital layout block with digital layout instances of a top layout module of the design layout.
A method for generating flat layout comprising:
- importing port definitions of a first and second hierarchical blocks from a source file as a first and second schematic symbols to a schematic design, respectively, each of the hierarchical blocks having one or more digital instances;
- instantiating the schematic symbols to a design schematic;
- importing each hierarchical block and its digital instances from the source file, wherein the second hierarchical block is a sub-hierarchy of the first hierarchical block;
- instantiating the first and second schematic symbols as a first and second hierarchical layout block within the flat layout, respectively, wherein the second hierarchical layout block is a sub-hierarchy block of the first hierarchical layout block;
- instantiating digital instances of each hierarchical block as digital layout instances within the flat layout;
- binding the digital layout instances within the flat layout to digital instances of the schematic symbols;
- embedding digital layout block instances within the design layout, by replacing the digital instances of a digital layout block with digital layout instances of a top hierarchical layout block module of the design layout;
A computer program product for generating a circuit layout, the product comprising a computer-readable storage medium in which program instructions are stored, the program instructions configured cause the computer to:
- generate the design layout by instantiating and interconnecting layout blocks within the design layout;
- bind digital instances within the design layout to instances within a design schematic;
- and
- embed digital layout block instances within the design layout by replacing the digital instances of a digital layout block with digital layout instances of a top layout module of the design layout.
A system for generating a circuit layout comprising:
- a user interface configured to accept input from the user and to display the circuit layout;
- a processing device coupled to the monitor;
- computer executable program code on a computer readable medium configured to cause the processing device to:
- generate the design layout by instantiating layout blocks within the design layout;
- bind digital instances within the design layout to instances within a design schematic;
- and
- embed digital layout block instances within the design layout by replacing the digital instances of a digital layout block with digital layout instances of a top layout module of the design layout.
Dependencies are inferred from the claim text.