Shared Memory

Abstract

The present invention relates to a shared memory (20) made on a chip based on semiconductors. The shared memory comprises: an integer number m, greater than one, of data buses (24); m address and control buses (200); m input/output interfaces (PI/PO, PO′), each input/output interface (PI/PO, PO′) being connected to one of the m data buses (24) and to one of the m address and control buses (200); an integer number p, greater than one, of memory banks (21, 22, 23), each memory bank (21, 22, 23) comprising: a memory (210, 220, 230), comprising a data input/output (I/O) and an address and control input (I) controlled by each of the address and control buses (200); a block of m switches (214, 224, 234), each of the m switches (214, 224, 234) being connected on the one hand to a memory data bus (213, 223, 233), said memory data bus (213, 223, 233) being connected to the data input/output (I/O) of the memory (210, 220, 230), and on the other hand to one of the m data buses (24). The shared memory (20) finds notably its application in the field of microelectronics.

Dependencies are inferred from the claim text.