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US 2010/0306477 A1Published application
Store prefetching via store queue lookahead
AssigneeOracle America, Inc.
InventorMark A. Luttrell
Life of this patent
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AssigneeOracle America, Inc.
InventorMark A. Luttrell
Estimating the term…
Systems and methods for efficient handling of store misses. A processor comprises a store queue that stores data for committed store instructions. Coupled to the store queue is a cache responsible for ensuring consistent ordering of store operations for all consumers, which may be accomplished by maintaining a corresponding cache line be in an exclusive state before executing a store operation. In response to a first committed store instruction missing in the cache, the store queue is configured to convey to the cache a second entry of the plurality of queue entries as a speculative prefetch instruction. This second entry corresponds to a committed store instruction that follows in program order the first committed store instruction of a given thread. If the prefetch instruction misses in the cache, the latency for acquiring a corresponding cache line overlaps with the latency of the first store instruction.
A computing system comprising:
A method comprising:
A computer readable storage medium storing program instructions operable to efficiently handle of store misses corresponding to multiple threads, wherein the program instructions are executable to:
Dependencies are inferred from the claim text.