Microcontroller with CAN Module
AssigneeMicrochip Technology Incorporated
InventorsTim L. Wilson, Joseph W. Triece, Steven G. Dawson
Life of this patent
Estimating the term…
Abstract
A microcontroller has a random access memory, and a Controller Area Network (CAN) controller with a control unit receiving an assembled CAN message. The control unit generates a buffer descriptor table entry using the assembled CAN message and stores the buffer descriptor table entry in the random access memory, and the buffer descriptor table entry has at least a message identifier and load data from the CAN message and information of a following buffer descriptor table entry.
Claims20
A microcontroller comprising:
- a random access memory;
- a Controller Area Network (CAN) controller comprising a control unit receiving an assembled CAN message, wherein the control unit generates a buffer descriptor table entry using said assembled CAN message and stores said buffer descriptor table entry in said random access memory, and wherein said buffer descriptor table entry comprises at least a message identifier and load data from said CAN message and information of a following buffer descriptor table entry.
A method of storing a Controller Area Network (CAN) message within a microcontroller comprising the steps of:
- receiving a CAN message;
- assembling the CAN message;
- generating a buffer descriptor table entry using said assembled CAN message;
- and
- storing said buffer descriptor table entry in a random access memory of said microcontroller, wherein said buffer descriptor table entry comprises at least a message identifier and load data from said CAN message and information of a following buffer descriptor table entry.
A 32-bit microcontroller comprising:
- a dual port 32-bit wide random access memory;
- and
- a Controller Area Network (CAN) controller comprising a control unit receiving an assembled CAN message, wherein the control unit generates a buffer descriptor table entry using said assembled CAN message and stores said buffer descriptor table entry in said random access memory, and wherein said buffer descriptor table entry consists of a 32-bit frame status word, a 32-bit next address location word, a 32-bit message identifier word, a 32-bit extended message identifier word, a first 32-bit data word, and a second 32-bit data word.
Dependencies are inferred from the claim text.