Digital data processing apparatus

A digital data processing apparatus comprising:

• an encoding unit configured to encode inputted digital data to generate encoded data with a predetermined bit rate, as well as to allow the encoded data to be sequentially stored in a memory, the encoded data including frames of first data size and second data size that is greater than the first data size;
• a frame number calculation unit configured to calculate at least either one of the number of frames of the first data size and the number of frames of the second data size, out of the frames, the number of which is n, stored in the memory;
• and
• an address calculation unit configured to calculate a second address of the memory based on a first address of the memory, the first and second data sizes, and a calculation result of the frame number calculation unit, the second address having beginning data stored therein of a frame that is stored in the memory subsequently to the n frames, the first address having beginning data stored therein indicating beginning of a frame that is stored in the memory the earliest in time among the n frames.