Manufacturing method of soi substrate
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorTomoaki MORIWAKA
Life of this patent
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Abstract
An object is to provide a manufacturing method of an SOI substrate in which a plurality of single crystal semiconductor layers uniform in quality is bonded to a substrate having a larger area than a single crystal silicon substrate. At the time of a heat treatment, uniform heat distribution in single crystal semiconductor substrates is realized by using a tray which has depression portions each with a large depth and is not in contact with the single crystal semiconductor substrate bonded to a base substrate as a tray for supporting the base substrate and holding the single crystal semiconductor substrates. Further, by providing a supporting portion for the base substrate between the depression portions of the tray, a contact area between the tray and the base substrate is reduced.
Claims18
A manufacturing method of an SOI substrate comprising the steps of:
- disposing a plurality of single crystal semiconductor substrates in a plurality of depression portions of a first tray, wherein bonding layers are formed over top surfaces of the plurality of single crystal semiconductor substrates, and embrittlement layers are formed at predetermined depths of the plurality of single crystal semiconductor substrates;
- bonding a base substrate and the plurality of single crystal semiconductor substrates by making the plurality of single crystal semiconductor substrates be in contact with the base substrate with the bonding layers interposed therebetween so as to bond surfaces of the bonding layers and a surface of the base substrate;
- detaching the first tray from the plurality of single crystal semiconductor substrates;
- disposing a second tray so that the plurality of single crystal semiconductor substrates overlaps with a plurality of depression portions of the second tray;
- and
- forming the base substrate with which a plurality of single crystal semiconductor layers separated from the single crystal semiconductor substrates is in contact, after generating a crack in the embrittlement layers by a heat treatment;
- wherein a depth of the depression portion of the first tray is smaller than a thickness of the single crystal semiconductor substrate, and
- wherein a depth of the depression portion of the second tray is larger than the thickness of the single crystal semiconductor substrate.
A manufacturing method of an SOI substrate comprising the steps of:
- disposing a plurality of single crystal semiconductor substrates in a plurality of depression portions of a first tray, wherein bonding layers are formed over top surfaces of the plurality of single crystal semiconductor substrates, and embrittlement layers are formed at predetermined depths of the plurality of single crystal semiconductor substrates;
- bonding a base substrate and the plurality of single crystal semiconductor substrates by making the plurality of single crystal semiconductor substrates be in contact with the base substrate with the bonding layers interposed therebetween, so as to bond surfaces of the bonding layers and a surface of the base substrate;
- detaching the first tray from the plurality of single crystal semiconductor substrates;
- disposing a second tray so that the plurality of single crystal semiconductor substrates overlaps with a plurality of depression portions of the second tray, wherein supporting portions are provided between the depression portions of the second tray;
- and
- forming the base substrate with which a plurality of single crystal semiconductor layers separated from the single crystal semiconductor substrates is in contact after generating a crack in the embrittlement layers by a heat treatment;
- wherein a depth of the depression portion of the first tray is smaller than a thickness of the single crystal semiconductor substrate,
- wherein a sum of a depth of the depression portion of the second tray and a height of the supporting portion of the second tray is larger than the thickness of the single crystal semiconductor substrate, and
- wherein a distance between adjacent depression portions of the second tray is larger than a width of the supporting portion.
Dependencies are inferred from the claim text.