Silicon Nitride Hardstop Encapsulation Layer for STI Region

A process of forming a trench isolation region, comprising:

• providing a semiconductor substrate structure comprising a semiconductor layer;
• forming a nitride layer over the semiconductor substrate structure;
• selectively forming a first opening in the nitride layer to expose part of the semiconductor layer;
• etching a second opening in the semiconductor layer using the first opening in the nitride layer to define an etch mask, where the first and second openings together form a trench opening;
• filling at least part of the trench opening with an oxide layer;
• depositing a first nitride layer on the oxide layer to completely cover the oxide layer;
• depositing a first protective oxide layer on the first nitride layer, where the first protective oxide layer is thicker on a bottom surface region of the trench opening than a vertical surface region of the trench opening;
• selectively removing any portion of the first protective oxide and first nitride layer from an upper portion of the vertical surface region of the trench opening while leaving at least a portion of the first protective oxide and first nitride layer at a bottom surface region of the trench opening;
• depositing a second oxide layer to fill the trench opening;
• polishing the second oxide layer with a chemical mechanical polish process to remove at least a portion of the second oxide layer;
• and
• densifying the first nitride layer, thereby forming a trench isolation region having a densified nitride encapsulation layer.

A method for fabricating semiconductor devices, comprising:

• providing a semiconductor wafer structure in which a relatively thick mask layer is formed over a relatively thin oxide layer, an SOI semiconductor layer and an underlying first semiconductor layer, where the SOI semiconductor layer and first semiconductor layer are separated by a buried insulator layer;
• exposing the buried insulator layer in a first area by forming a trench opening in the SOI semiconductor layer;
• depositing a first layer of high density plasma oxide to fill the trench opening to form a trench isolation structure that is substantially as thick as the SOI semiconductor layer;
• depositing a tensile silicon nitride layer on the first layer of high density plasma oxide;
• depositing a second layer of high density plasma oxide on the tensile silicon nitride layer, where the second layer of high density plasma oxide is thicker on a bottom surface region of the trench opening than a vertical surface region of the trench opening;
• removing any portion of the second layer of high density plasma oxide and tensile silicon nitride layer from an upper portion of the vertical surface region of the trench opening while leaving at least a portion of the second layer of high density plasma oxide and tensile nitride layer at a bottom surface region of the trench opening;
• depositing a third layer of high density plasma oxide;
• and
• polishing the third layer of high density plasma oxide with a chemical mechanical polish process to remove at least a portion of the third layer of high density plasma oxide and densifying the tensile nitride layer, thereby forming a densified nitride encapsulation layer on the trench isolation structure.