A semiconductor integrated circuit comprising a reception interface, a memory interface, a data transfer unit, and a process unit,
- wherein the reception interface includes a buffer capable of sequentially storing a plurality of pieces of reception packet data, and a timer performing counting operation,
- wherein the memory interface can be coupled to an external memory,
- wherein the data transfer unit can transfer the pieces of reception packet data stored in the buffer to the external memory coupled to the memory interface,
- wherein the process unit can process the pieces of reception packet data transferred and stored to the external memory,
- wherein when the data transfer unit completes transfer of the pieces of reception packet data of predetermined number of packets from the buffer to the external memory, the data transfer unit can notify the process unit of a data transfer completion interruption,
- wherein in response to occurrence of the data transfer completion interruption from the data transfer unit, the process unit can start processing the pieces of reception packet data stored in the external memory,
- wherein during interruption of reception of the pieces of reception packet data to the reception interface, the timer executes the counting operation,
- wherein in the case where the data transfer of the pieces of reception packet data of the predetermined number of packets is not completed within predetermined count time by the counting operation during the reception interruption, the timer can notify the process unit of a timer interruption,
- wherein in response to occurrence of the timer interruption from the timer, the process unit can start processing reception packet data stored in the external memory prior to the reception interruption,
- wherein the reception interface further includes a packet counter that stores the number of transfer packets of the reception packet data transferred to the external memory by the data transfer unit,
- wherein before the process unit starts processing the pieces of reception packet data stored in the external memory in response to occurrence of the data transfer completion interruption, the process unit can obtain the number of transfer packets from the packet counter,
- wherein in response to occurrence of the timer interruption, before the process unit starts processing the reception packet data stored in the external memory before the reception interruption, the process unit can obtain the number of transfer packets from the packet counter,
- wherein after obtaining the number of transfer packets from the packet counter by the process unit, the value of the packet counter is reset to zero,
- wherein after restart of reception after the reception interruption, the packet counter stores the number of transfer restart packets which are restarted to be transferred to the external memory by the data transfer unit,
- wherein the process unit obtains the number of transfer packets of the reception packet data stored in the external memory before the reception interruption from the packet counter in response to the occurrence of the timer interruption, after that, the data transfer completion interruption is generated, and
- wherein according to the number of transfer packets obtained from the packet counter by the process unit in response to the occurrence of the timer interruption, either the process responding to the occurrence of the timer interruption of the reception packet data stored in the external memory or the process responding to the occurrence of the data transfer completion interruption of the pieces of reception packet data stored in the external memory is omitted.