Architecture for very high-speed decision feedback sequence estimation
AssigneeBroadcom Corporation
InventorsArthur Abnous, Avanindra Madisetti, Christian A.J. Lutkemeyer
Life of this patent
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Abstract
A method for providing a next-cycle input sample from a decision feedback equalizer to a symbol decoder using look-ahead computations such that timing contention between the decision feedback equalizer and the symbol decoder is reduced. During a symbol period, a set of possible values is computed in the decision feedback equalizer and a set of path memory symbols is computed in the symbol decoder, the set of path memory symbols being based on a current input sample. During the same symbol period, one of the possible values is selected as the next-cycle input sample based on at least one of the next-cycle path memory symbols produced from the symbol decoder.
Claims13
1-15. (canceled)
A decoder comprising:
- a trellis decoder operable to receive a plurality of values, each received value representing a possible value of a received signal, the trellis decoder comprising a slicer block operable to generate intermediate decisions and a path memory module operable to generate tentative decisions based at least in part on the intermediate decisions;
- a decision feedback equalizer operable to generate, based at least in part on the tentative decisions, a tail value representing an estimate of a tail component of intersymbol interference (ISI) in the received signal;
- a subtractor operable to subtract the tail value from a received signal to generate a partially ISI-compensated signal;
- and
- a multiple decision feedback equalizer operable to receive the partially ISI-compensated signal and the intermediate decisions and to provide a plurality of values to the trellis decoder based at least in part thereon, each provided value representing a possible value of the received signal.
A method of decoding a received signal comprising:
- subtracting a tail value from the received signal to generate a partially ISI-compensated signal, the tail value representing an estimate of a tail portion of intersymbol interference (ISI) in the received signal;
- calculating, using a multiple decision feedback equalizer, a plurality of trellis code input values based at least in part on the partially ISI-compensated signal and previous-cycle intermediate decisions received from a slicer block of a trellis decoder, each trellis code input value representing a possible value of the received signal;
- performing trellis slicing operations on the plurality of trellis code input values to generate intermediate decisions;
- generating tentative decisions based at least in part on the intermediate decisions;
- providing the intermediate decisions to the multiple decision feedback equalizer for calculation of next-cycle trellis code input values;
- and
- generating, based at least in part on the tentative decisions, a next-cycle tail signal representing an estimate of a tail portion of intersymbol interference (ISI) in a next-cycle received signal.
Dependencies are inferred from the claim text.