Phase lock loop with a multiphase oscillator

A method for locking onto a reference phase comprising the steps of:

• generating a control signal indicating a difference between a reference phase signal and a feedback phase signal;
• generating a plurality of multiphase signals in response to the control signal;
• and
• generating a digital phase indicating signal utilizing a fractional phase look-up table responsive to the plurality of multiphase signals.

A phase lock loop comprising:

• a phase detector for generating a control signal indicating the difference between a reference phase signal and a feedback phase signal;
• a plurality of DQ flip-flops responsive to the control signal, each DQ flip-flop generating a clock signal at a fraction of the frequency of the control signal;
• and
• a multiphase oscillator responsive to the reduced frequency clock signals for generating a plurality of multiphase signals that are used to provide a first digital phase indicating signal.

A method for locking onto a reference phase comprising the steps of:

• generating a control signal indicating a difference between a reference phase signal and a feedback phase signal;
• generating a plurality of reduced frequency control signals in parallel from the control signal;
• generating a plurality of multiphase signals in an oscillator in response to the plurality of reduced frequency control signals;
• and
• generating a digital phase indicating signal utilizing a fractional phase look-up table responsive to the plurality of multiphase digital signals.