Clock regeneration apparatus and electric equipment

A clock regeneration apparatus, comprising:

• an oscillator including first and second gating groups connected in cascade connection to each other in such a manner as to be capable of forming an oscillation loop, said first and second gating groups being controlled to gate an internal clock signal with first and second gating signals different from each other, respectively, said oscillator outputting a clock signal at least from said second gating group;
• an edge detection section adapted to detect an edge of a reception data signal;
• a phase decision section adapted to decide a phase of the clock signal for each edge of the reception data signal and output a result of the decision as a phase decision signal;
• and
• a gating signal generation section adapted to generate the first and second gating signals and output the first and second gating signals to said first and second gating groups of said oscillator, respectively;
• said gating signal generation section being operable to generate, as the first gating signal, one of a signal which indicates rising edge detection and another signal which indicates falling edge detection based on a result of the detection by said edge detection section in response to a phase decision signal of said phase decision section, and delay the other one of the signals by one half cycle that of the reception data signal to generate the second gating signal;
• said oscillator outputting the clock signal having a phase controlled based on the first and second gating signals and synchronized with the reception data signal.

An electronic equipment, comprising:

• a clock regeneration apparatus;
• and
• a functional block adapted to carry out a process for a reception data signal in synchronism with a clock signal regenerated by said clock regeneration apparatus;
• said clock regeneration apparatus including
• an oscillator including n gating groups connected in cascade connection to each other in such a manner as to be capable of forming an oscillation loop, n being an integer of two or more, said gating groups being controlled to gate an internal clock signal with first to nth gating signals different from one another, respectively, said oscillator outputting a clock signal at least from the nth one of said gating groups,
• an edge detection section adapted to detect an edge of a reception data signal,
• a phase decision section adapted to decide a phase of the clock signal for each edge of the reception data signal and output a result of the decision as a phase decision signal, and
• a gating signal generation section adapted to generate the first to nth gating signals and output the gating signals to first to nth ones of said gating groups of said oscillator, respectively;
• said gating signal generation section being operable to select one of the gating signals into which an edge detection signal of said edge detection section is to be injected in response to the phase decision signal of said phase decision section, delaying the selected gating signal and outputting the gating signal to said oscillator;
• said oscillator outputting the clock signal having a phase controlled based on the first to nth gating signals and synchronized with the reception data signal.

An electronic equipment, comprising:

• a clock regeneration apparatus;
• and
• a functional block adapted to carry out a process for a reception data signal in synchronism with a clock signal regenerated by said clock regeneration apparatus;
• said clock regeneration apparatus including
• an oscillator including first and second gating groups connected in cascade connection to each other in such a manner as to be capable of forming an oscillation loop, said first and second gating groups being controlled to gate an internal clock signal with first and second gating signals different from each other, respectively, said oscillator outputting a clock signal at least from said second gating group,
• an edge detection section adapted to detect an edge of a reception data signal,
• a phase decision section adapted to decide a phase of the clock signal for each edge of the reception data signal and output a result of the decision as a phase decision signal, and
• a gating signal generation section adapted to generate the first and second gating signals and output the first and second gating signals to said first and second gating groups of said oscillator, respectively;
• said gating signal generation section being operable to generate, as the first gating signal, one of a signal which indicates rising edge detection and another signal which indicates falling edge detection based on a result of the detection by said edge detection section in response to a phase decision signal of said phase decision section, and delay the other one of the signals by one half cycle that of the reception data signal to generate the second gating signal;
• said oscillator outputting the clock signal having a phase controlled based on the first and second gating signals and synchronized with the reception data signal.