Latch with single clocked device

A semiconductor device comprising:

• a mechanical package;
• and
• a semiconductor die comprising:
• a semiconductor layer,
• a plurality of metal layers,
• a clock distribution network that distributes a clock signal within the die, and
• a D-latch circuit comprising:
• a feed forward circuit;
• a full keeper circuit;
• and
• an output buffer circuit;
• wherein:
• the feed forward circuit inputs the clock signal and a data signal,
• the feed forward circuit is connected to an input of the full keeper circuit,
• the feed forward circuit is connected to an output of the full keeper circuit and an input of the output buffer circuit,
• the output buffer circuit outputs an output signal, and
• the D-latch circuit consists of a single clocked device that switches with the clock signal.

A system comprising:

• an input device;
• an output device;
• a mechanical chassis;
• a printed circuit board;
• and
• a semiconductor device comprising:
• a mechanical package, and
• a semiconductor die;
• wherein the semiconductor die comprises:
• a semiconductor layer,
• a plurality of metal layers,
• a clock distribution network that distributes a clock signal within the die, and
• a D-latch circuit comprising:
• a feed forward circuit;
• a full keeper circuit;
• and
• an output buffer circuit;
• wherein:
• the feed forward circuit inputs the clock signal and a data signal,
• the feed forward circuit is connected to an input of the full keeper circuit,
• the feed forward circuit is connected to an output of the full keeper circuit and an input of the output buffer circuit,
• the output buffer circuit outputs an output signal, and
• the D-latch circuit consists of a single clocked device that switches with the clock signal.