Building block for a secure cmos logic cell library
AssigneesSypherMedia International, Inc., Promtek Programmable Memory Technology, Inc.
InventorsRonald P. Cocchi, James P. Baukus, Bryan J. Wang, Lap Wai Chow, Paul Ouyang
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Abstract
A logical building block and method of using the building block to design a logic cell library for CMOS (Complementary Metal Oxide Silicon) ASICs (Application Specific Integrated Circuits) is disclosed. Different logic gates, built with the same building block as described in this invention, will have the same schematics of transistor connection and also the same physical layout so that they appear to be physically identical under optical or electron microscopy. An ASIC designed from a library of such logic cells is strongly resistant to a reverse engineering attempt.
Claims18
A logic circuit, comprising:
- a first logic input having a first logical input state;
- a second logic input having a second logical input state;
- a logic output, communicatively coupled to the first logic input and the second logic input, the logic output having a logical state being a selectable one of a plurality of logical functions of the first logic input state and the second logic input state;
- and
- a control input for selecting the logical function of the logical circuit.
A logic circuit, comprising:
- a plurality of interconnected logical building block circuits, each building block circuit having an identical circuit layout and each building block circuit comprising:
- a first logic input having a first logical input state;
- a second logic input having a second logical input state;
- a logic output, communicatively coupled to the first logic input and the second logic input, the logic output having a logical state being a selectable one of a plurality of logical functions of the first logic input state and the second logic input state;
- and
- a control input for selecting the logical function of the logical circuit.
Dependencies are inferred from the claim text.