Circuits for soft logical functions
AssigneeMitsubishi Electric Research Laboratories, Inc.
InventorsBenjamin Vigoda, David Reynolds
Life of this patent
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Abstract
A circuit implementing a soft logical processing network includes an interconnection of analog processing elements, which can include soft logic gates, the soft logic gates including one or more soft logic gates. In some examples, each of the soft logic gates include multiple circuit parts, with each part including an input configured to accept a voltage signal representation of a soft logical quantity, and a conversion section configured to use the accepted voltage representation to form a corresponding current signal. The current signals are combined to form a signal representation of the output of the gate.
Claims12
A circuit implementing a soft logical processing network comprising an interconnection of analog processing elements including soft logic gates, the soft logic gates comprising one or more soft logic gates, each soft logic gate comprising:
- a plurality of circuit parts, each part including
- an input configured to accept a voltage signal representation of a soft logical quantity, and
- a conversion section configured to use the accepted voltage representation form a current signal that depends on the soft logical quantity;
- wherein in at least a first circuit part of the plurality of circuit parts, the conversion section is configured to convert the accepted voltage representation to provide a corresponding current signal representation of the soft logical quantity;
- and
- wherein in at least a second circuit part of the plurality of circuit parts, the conversion section is configured to combine the accepted voltage representation and the current signal representation provided by another of the circuit parts to provide a current signal representation;
- and
- wherein the soft logic gate further comprises a signal combination part coupled to the conversion section of one or more of the circuit parts to form a current signal representation of an output of the soft logic gate.
Dependencies are inferred from the claim text.