US 2010/0301493 A1 · PACKAGED ELECTRONIC DEVICES HAVNG DIE ATTACH REGIONS WITH SELECTIVE THIN DIELECTRIC LAYER

Abstract

A packaged electronic device including a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to the land pad and a non-die attach region. The non-die attach region includes a second dielectric layer, wherein a thickness of the second dielectric layer is>a thickness of the first dielectric layer by at least 5 μm. An IC die has a top semiconductor surface including active circuitry and at least one bonding conductor formed on the top semiconductor surface, and a bottom surface, wherein the bonding conductor of the IC die is joined to the land pad of the package substrate. An underfill layer is between the IC die and the die attach region.

Claims24

Dependent claims

A packaged electronic device, comprising:

a package substrate having a top substrate surface including a die attach region including at least one land pad thereon and a first dielectric layer positioned lateral to said land pad and a non-die attach region, said non-die attach region including a second dielectric layer, wherein a thickness of said second dielectric layer is>a thickness of said first dielectric layer by at least 5 μm, and
an IC die having a top semiconductor surface including active circuitry and at least one bonding conductor formed on said top semiconductor surface and a bottom surface, wherein said bonding conductor of said IC die is joined to said land pad of said package substrate, and
an underfill layer between said IC die and said die attach region.

A method of forming a packaged electronic device, comprising:

providing (i) a package substrate having top substrate surface including a die attach region including at least one land pad thereon and a non-die mounting region and (ii) an IC die having a top semiconductor surface including active circuitry and at least one bonding conductor formed on said top semiconductor surface and a bottom surface;
forming a dielectric layer on said top substrate surface of said package substrate having a first thickness over said die attach region in regions lateral to said land pad and a second thickness over said non-die mounting region, wherein said second thickness>said first thickness by at least 5 μm, and
mounting said IC die to said top substrate surface of said package substrate, and
forming an underfill layer to fill a gap between said IC die and said top substrate surface.

1 more element

Dependencies are inferred from the claim text.

Packaged electronic devices havng die attach regions with selective thin dielectric layer

Life of this patent

Packaged electronic devices havng die attach regions with selective thin dielectric layer

Life of this patent

Abstract

Claims24