High yield and high throughput method for the manufacture of integrated circuit devices of improved integrity, performance and reliability
OwnerByung Chun Yanginventor
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OwnerByung Chun Yanginventor
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A method for forming a contact opening, such as a via hole, is provided. In the method, a sacrificial layer is deposited over a damascene feature prior to exposing a conductor formed in a substrate at a bottom of the opening. The sacrificial layer is provided to prevent damage or contamination of materials used. Even after the conductor has been exposed once or more times, the sacrificial layer can be deposited over the damascene feature to protect it from further damage or contamination by a subsequent process that will further expose the conductor at the contact opening bottom. The exposing step may form a recess in the conductor. By further forming a trench feature over the contact opening, a dual damascene feature can be fabricated. By performing further damascene process steps over already formed damascene interconnect features, various interconnect systems, such as a single damascene planar via, a single damascene embedded via and a dual damascene interconnect system having either a planar via or an embedded via, can be fabricated. Dual damascene interconnect structures having either a sacrificial layer incorporated in them or having no sacrificial layer incorporated in them are also provided.
A method for fabricating an interconnect system, comprising:
A method for fabricating a dual damascene interconnect system, comprising:
An integrated circuit device structure, comprising:
An integrated circuit device structure, comprising:
A method for fabricating an integrated circuit device, comprising, depositing a sacrificial layer over a preliminary damascene feature comprising at least a preliminary contact hole, said preliminary damascene feature being formed in a dielectric layer deposited over a substrate, said substrate having a conductor formed therein.
Dependencies are inferred from the claim text.