Stud bumps as local heat sinks during transient power operations
AssigneeTexas Instruments Incorporated
InventorsSiva P. Gurrum, Kapil Heramb Sahasrabudhe, Vikas Gupta
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Abstract
A thermal management configuration for a flip chip semiconductor device is disclosed. The device includes a high power silicon based die having a metal bonding surface. A plurality of interconnects are formed on the metal surface and connected to a substrate. A plurality of thermal management stud bumps are formed on the metal bonding surface, the thermal management stud bumps positioned distinct from the interconnects and local to die hot spots, exposed ends of the thermal management stud bumps spaced from the substrate.
Claims13
A thermal management configuration for transient operation of a flip chip semiconductor device, the configuration comprising:
- a high power die comprising a metal bonding surface;
- a plurality of interconnects formed on the metal bonding surface and connected to a substrate;
- and
- a plurality of heat dissipating stud bumps formed on the metal bonding surface and local to die hot spots, exposed ends of the heat dissipating stud bumps spaced from the substrate.
A flip chip semiconductor device comprising:
- a high power silicon based integrated circuit (IC) having transient operations;
- a metal bonding layer formed over the IC;
- interconnects formed on the metal bonding layer, the interconnects connected to a substrate;
- and
- thermal management stud bumps formed on the metal bonding layer and local to die hot spots, exposed ends of the thermal management stud bumps spaced from the substrate.
13-17. (canceled)
Dependencies are inferred from the claim text.