Tantalum silicon oxynitride high-k dielectrics and metal gates
AssigneeMicron Technology, Inc.
InventorsLeonard Forbes, Kie Y. Ahn, Arup Bhattacharyya
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Abstract
Electronic apparatus and methods of forming the electronic apparatus include a tantalum silicon oxynitride film on a substrate for use in a variety of electronic systems. The tantalum silicon oxynitride film may be structured as one or more monolayers. The tantalum silicon oxynitride film may be formed using a monolayer or partial monolayer sequencing process. Metal electrodes may be disposed on a dielectric containing a tantalum silicon oxynitride film.
Claims34
A method comprising:
- forming a dielectric including TaSiON, the TaSiON formed using a monolayer or partial monolayer sequencing process, wherein forming the TaSiON includes nitridizing TaSiO after forming the TaSiO using the monolayer or partial monolayer sequencing process or annealing TaON with SiO and SiN after forming the TaON, the SiO, and the SiN using the monolayer or partial monolayer sequencing process;
- and
- forming a metal on and contacting the dielectric.
A method comprising:
- forming a dielectric on a substrate, the dielectric including TaSiON, the TaSiON formed using a monolayer or partial monolayer sequencing process including:
- forming TaSiO using the monolayer or partial monolayer sequencing process;
- and
- nitridizing the TaSiO to form TaSiON;
- and
- forming a metal on and contacting the dielectric.
A method comprising:
- forming a dielectric on a substrate, the dielectric including TaSiON, the TaSiON formed using a monolayer or partial monolayer sequencing process including:
- forming TaON by the monolayer or partial monolayer sequencing process
- forming SiO by the monolayer or partial monolayer sequencing process
- forming SiN by the monolayer or partial monolayer sequencing process
- annealing the TaON with the SiO and the SiN to form TaSiON;
- and
- forming a metal on and contacting the dielectric.
A method comprising:
- forming an array of memory cells on a substrate, each memory cell including a dielectric having TaSiON, wherein forming each memory cell includes:
- forming the TaSiON using a monolayer or partial monolayer sequencing process, wherein forming the TaSiON includes nitridizing TaSiO after forming the TaSiO using the monolayer or partial monolayer sequencing process or annealing TaON with SiO and SiN after forming the TaON, the SiO, and the SiN using the monolayer or partial monolayer sequencing process;
- and
- forming a metal electrode on and contacting the dielectric.
A method comprising:
- providing a controller;
- and
- coupling a transistor to the controller, the transistor having a metal gate disposed on a dielectric on a substrate for an integrated circuit, the dielectric having TaSiON, the TaSiON formed using a monolayer or partial monolayer sequencing process, wherein forming the TaSiON includes nitridizing TaSiO after forming the TaSiO using the monolayer or partial monolayer sequencing process or annealing TaON with SiO and SiN after forming the TaON, the SiO, and the SiN using the monolayer or partial monolayer sequencing process.
A electronic device comprising:
- a substrate;
- a dielectric disposed on the substrate, the dielectric including TaSiON structured as one or more monolayers;
- and
- a metal on and contacting the dielectric.
Dependencies are inferred from the claim text.