High voltage nmos with low on resistance and associated methods of making
AssigneeMonolithic Power Systems, Inc.
InventorJi-Hyoung Yoo
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Abstract
High voltage NMOS devices with low on resistance and associated methods of making are disclosed herein. In one embodiment, a method for making N typed MOSFET devices includes forming an N-well and a P-well with twin well process, forming field oxide, forming gate comprising an oxide layer and a conducting layer, forming a P-base in the P-well, the P-base being self-aligned to the gate, side diffusing the P-base to contact the N-well, and forming N+ source pickup region and N+ drain pickup region.
Claims20
A MOSFET device, comprising:
- a substrate having a surface;
- a drain region in the substrate, the drain region having a drain well and a drain pickup region of a first doping type;
- a source region in the substrate, the source region having a source well and a source base of a second doping type, the source base being located in the source well with the source base contacting the drain well;
- and
- a gate on the surface of the substrate, the gate having an oxide layer and a conductive layer overlapping with the source base and the drain well.
A method of making an N-type MOSFET device, comprising:
- forming an N-well in a substrate having a surface;
- performing N-well oxidation to form N-well oxide at least proximate to the surface of the substrate;
- forming a P-well in the substrate using the N-well oxide as blocking mask;
- side diffusing the P-well to the N-well under the N-well oxide;
- removing the N-well oxide to form a silicon step on the surface of the substrate;
- forming a gate not overlapping the silicon step;
- forming a P-base in the P-well, the P-base being self-aligned to the gate;
- side diffusing the P-base to contact an edge of the P-well;
- and
- forming N+ source pickup region and N+ drain pickup region.
A method for making N typed MOSFET devices, comprising:
- forming an N-well and a P-well with twin well process;
- forming field oxide;
- forming gate comprising an oxide layer and a conducting layer;
- forming a P-base in the P-well, the P-base being self-aligned to the gate;
- side diffusing the P-base to contact the N-well;
- and
- forming N+ source pickup region and N+ drain pickup region.
Dependencies are inferred from the claim text.