Nonvolatile semiconductor memory device and manufacturing method thereof

A nonvolatile semiconductor memory device comprising:

• first laminated bodies each having a plurality of first gate electrodes laminated with insulating films disposed therebetween to form a plurality of first memory cells on a substrate and having a gate electrode of a first select transistor laminated above an uppermost one of the first gate electrodes with an insulating film disposed therebetween,
• second laminated bodies located separately from the first laminated bodies on the substrate and each having a plurality of second gate electrodes laminated with insulating films disposed therebetween to form a plurality of second memory cells and having a gate electrode of a second select transistor laminated above an uppermost one of the second gate electrodes with an insulating film disposed therebetween,
• gate insulating film portions located on side surfaces of the first laminated bodies and the second laminated bodies and each containing a charge storage layer,
• first semiconductor layers of a first conductivity type that are each located between the first laminated bodies and the second laminated bodies to a portion lying on bottom portions of the gate electrodes of the respective select transistors in a laminated direction and act as active regions of the first memory cells and the second memory cells, the first semiconductor layers being in contact with the gate insulating film portions,
• second semiconductor layers of a second conductivity type located on the first semiconductor layers to portions that lie on top portions of the gate electrodes of the respective select transistors in a laminated direction,
• third semiconductor layers of the first conductivity type located on the second semiconductor layers,
• isolation insulating films located in the second and third semiconductor layers to separate the second and third semiconductor layers into portions on the first laminated body sides and the second laminated body sides, and
• a substrate potential applying electrode located to penetrate the isolation insulating films from a front surface side to a back surface side thereof and connected to the first semiconductor layers.

A manufacturing method of a nonvolatile semiconductor memory device comprising:

• forming a laminated body by laminating a plurality of gate electrodes used to configure a plurality of memory cells with insulating films disposed therebetween on a substrate and laminating a gate electrode of a select transistor on an uppermost one of the gate electrodes with an insulating layer disposed therebetween,
• forming a groove in a central portion of the laminated body to separate the laminated body into first laminated bodies and second laminated bodies,
• forming a gate insulating film portion containing a charge storage layer on side surfaces of the groove,
• filling and forming a first semiconductor layer acting as active regions of the memory cells in the groove in which the gate insulating film portion is formed,
• forming a second semiconductor layer acting as a channel of the select transistor and extending from a surface of the first semiconductor layer to a portion lying on a bottom portion of the gate electrode of each select transistor,
• forming a third semiconductor layer acting as one of source and drain regions of the select transistor and extending from a surface of the second semiconductor layer to a portion lying on a top portion of the gate electrode of each select transistor,
• filling and forming an isolation insulating film in the second and the third semiconductor layers to separate the second and third semiconductor layers into portions on the first laminated bodies and the second laminated body sides, and
• forming a substrate potential applying electrode that penetrates the isolation insulating film from a front surface side to a back surface side thereof and is connected to the first semiconductor layer.