Wafer bonding technique in nitride semiconductors
AssigneeMassachusetts Institute of Technology
InventorsJinwook Chung, Han Wang, Tomas Palacios
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Abstract
A semiconductor arrangement is provided that includes one or more substrate structures. One or more nitride-based material structures are used in fabricating nitride-based devices. One or more intermediary layers are interposed between the one or more substrate structures and the one or more nitride-based material structures. The one or more intermediary layers support the lattice mismatch and thermal expansion coefficients between the one or more nitride-based material structure and the one or more substrate structures. Several new electronic devices based on this arrangement are described.
Claims22
A semiconductor arrangement comprising:
- one or more substrate structures;
- one or more nitride-based material structures for fabricating nitride-based devices;
- and
- one or more intermediary layers being interposed between said one or more substrate structures and said one or more nitride-based material structures, said one or more intermediary layers supporting the lattice mismatch and thermal expansion coefficients between said one or more nitride-based material structure and said one or more substrate structures.
A method of fabricating a nitride-base device comprising:
- providing one or more substrate structures;
- providing one or more nitride-based material structures;
- and
- positioning one or more intermediary layers between said one or more substrate structures and said one or more nitride-based material structures, said one or more intermediary layers supporting the lattice mismatch and thermal expansion coefficients between said one or more nitride-based material structure and said one or more substrate structures.
Dependencies are inferred from the claim text.