Forming Phase-Change Memory Using Self-Aligned Contact/Via Scheme

An integrated circuit structure comprising:

• an access transistor comprising a first source/drain region;
• a bottom metallization layer over the access transistor;
• an inter-layer dielectric (ILD) over the access transistor, and under and contacting the bottom metallization layer, wherein the ILD comprises a lower portion and an upper portion;
• a first contact plug directly over and connected to the first source/drain region, wherein the first contact plug is in the ILD;
• a phase change strip over the lower portion of the ILD and having a top surface lower than a top surface of the ILD;
• a second contact plug in the upper portion of the ILD and electrically connected to the phase change strip, wherein the second contact plug does not extend into the lower portion of the ILD;
• a peripheral transistor comprising a second source/drain region;
• and
• a third contact plug extending from a top surface of the ILD into the ILD and electrically connected to the second source/drain region, wherein the third contact plug has a continuous sidewall profile, and wherein a first bottom surface of the second contact plug is higher than a second bottom surface of the third contact plug.

An integrated circuit structure comprising:

• a semiconductor substrate;
• a first metallization layer over the semiconductor substrate;
• a second metallization layer over the first metallization layer;
• an inter-metal dielectric (IMD) between the first metallization layer and the second metallization layer;
• a phase change random access memory (PCRAM) cell comprising a phase change strip, wherein the phase change strip comprises a top surface lower than a top surface of the IMD, and a bottom surface higher than a bottom surface of the IMD;
• a first metal line in the first metallization layer;
• a second metal line in the second metallization layer;
• a first via between and contacting the first metal line and the second metal line;
• and
• a second via between and contacting the second metal line and the phase change strip.

A method of forming an integrated circuit structure, the method comprising:

• forming a dielectric layer comprising an upper portion and a lower portion, wherein the dielectric layer is selected from the group consisting essentially of an inter-layer dielectric (ILD) and an inter-metal dielectric (IMD);
• forming a phase change random access memory (PCRAM) cell comprising a phase change strip, wherein the phase change strip is formed after a step of forming the lower portion, and before a step of forming the upper portion, of the dielectric layer;
• forming a first conductive column electrically connected to the phase change strip, wherein the first conductive column extends from the top surface of the dielectric layer down into the dielectric layer;
• and
• forming a second conductive column in a peripheral region simultaneously with the step of forming the first conductive column, wherein the first conductive column and the second conductive column have different heights.