Integrated circuit, debugging circuit, and debugging command control method
AssigneeFujitsu Microelectronics Limited
InventorsShuhei SATO, Takashi Sato
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a bus; a processing unit configured to execute a user program; and a debugging circuit connected to the bus, the debugging circuit transferring a command in a command register to the processing unit via the bus in response to a command transfer request from the processing unit, wherein, when the processing unit halts the execution of the user program and makes a request for the command transfer request to the debugging circuit, the debugging circuit makes a response for freeing the use right of the bus from the processing unit in a period between the command transfer request and the command transfer operation.
Claims13
An integrated circuit comprising:
- a bus;
- a processing unit configured to execute a user program;
- and
- a debugging circuit connected to the bus, the debugging circuit transferring a command in a command register to the processing unit via the bus in response to a command transfer request from the processing unit,
- wherein, when the processing unit halts the execution of the user program and makes a request for the command transfer request to the debugging circuit, the debugging circuit makes a response for freeing the use right of the bus from the processing unit in a period between the command transfer request and the command transfer operation.
A debugging circuit that is connected to a processing unit that executes a user program via a bus, the debugging circuit comprising:
- a command register configured to store a command;
- and
- a control circuit configured to transfer the command to the processing unit via the bus in response to a command transfer request from the processing unit,
- wherein, when the control circuit receives the command transfer request from the processing unit that halts the execution of the user program, the control circuit makes a response for freeing the use right of the bus from the processing unit in a period between the command transfer request and a command transfer operation.
A debugging command control method for use with an integrated circuit including a bus, a processing unit configured to execute a user program, and a debugging circuit connected to the bus, the debugging circuit transferring a command to the processing unit via the bus in response to a command transfer request from the processing unit, the debugging command control method comprising:
- halting the execution of the user program and transmitting the command transfer request from the processing unit to the debugging circuit;
- sending, in response to the command transfer request, a signal indicating being in preparation for a response from the debugging circuit;
- and
- freeing the use right of the bus from the processing unit in response to the signal indicating being in preparation for a response.
Dependencies are inferred from the claim text.