Systolic array and calculation method
AssigneeNEC Corporation
InventorKatsutoshi Seki
Life of this patent
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Abstract
A linear systolic array is added to the lower side of a trapezoid systolic array created by combining a triangular systolic array and a square systolic array. In order to make the connection among the cells fixed, the intermediate result output from each row of the trapezoid systolic array to a lower row is shifted in phase with respect to the intermediate result of the complex MFA algorithm, the phase shift is absorbed by the next row, and the phase shift in the intermediate result output from the last row of the trapezoid systolic array is corrected by the linear systolic array. Each cell is implemented by a CORDIC circuit that processes vector angle computation, vector rotation, division, and multiply-and-accumulate with a constant delay.
Claims23
A systolic array apparatus that performs complex matrix computation using MFA (Modified Faddeeva Algorithm), the apparatus comprising:
- a trapezoid systolic array that includes a triangular systolic array and a square systolic array;
- and
- a linear systolic array arranged corresponding to the last row of the square systolic array, wherein
- one row in the trapezoid systolic array supplies a phase-shifted MFA intermediate processing result to a row following the one row,
- the following row performs phase rotation processing to absorb an effect of a phase shift, and
- the linear systolic array corrects a phase shift of an MFA processing result output from the last row of the trapezoid systolic array.
A computation method using a complex matrix computing systolic array that uses MFA (Modified Faddeeva Algorithm), the method comprising:
- providing a linear systolic array for a trapezoid systolic array that includes a triangular systolic array and a square systolic array;
- each one row in the trapezoid systolic array outputting a phase-shifted MFA intermediate processing result to the row following the one row, and the following row performing phase rotation processing to absorb an effect of a phase shift;
- and
- the linear systolic array correcting a phase shift in an MFA processing result output from the last row of the trapezoid systolic array.
A systolic array apparatus comprising:
- a trapezoid systolic array including a triangular systolic array and a square systolic array, one side of the triangular systolic array and one side of the square systolic array being joined together to form a longer side that forms the upper side of the trapezoid systolic array;
- and
- a linear systolic array arranged on a side of a shorter side that forms the lower side of the trapezoid systolic array,
- each cell of each of the systolic arrays being implemented by a CORDIC circuit that processes vector angle computation, vector rotation, division, and multiply-and-accumulate with a predetermined delay,
- the trapezoid systolic array receiving an input from a first row on a side of the upper side and an output being delivered from the linear systolic array located on the lower side of the trapezoid systolic array, wherein, in the trapezoid systolic array,
- each of second and subsequent rows comprises:
- a boundary processing unit that receives a first component of a phase-shifted complex MFA (Modified Faddeeva Algorithm) intermediate processing result and a phase shift parameter supplied from the preceding row and generates first and second vector rotation parameters, a multiply-and-accumulate coefficient, and a phase shift parameter;
- and
- an internal processing unit that receives a component other than the first component of the phase-shifted MFA intermediate processing result, the first and second vector rotation parameters, and the multiply-and-accumulate coefficient and supplies the phase-shifted MFA intermediate processing result to the following row,
- the intermediate result output from each row of the trapezoid systolic array to the following row being shifted in phase with respect to the intermediate result of the complex MFA algorithm, and the phase shift being absorbed by the following row,
- the linear systolic array correcting a phase shift in the complex MFA processing result by performing phase rotation for an input signal from the internal processing unit in the bottom row of the trapezoid systolic array based on a phase shift parameter supplied from the bottom row of the trapezoid systolic array.
Dependencies are inferred from the claim text.