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US 2010/0250224 A1Published application
Power source noise analysis device and analysis method
AssigneeFuji Xerox Co., Ltd.
InventorsDaisuke IGUCHI, Takahiro HORIGUCHI
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Abstract
A power source noise analysis device includes an analysis portion. The analysis portion estimates an internal impedance of a semiconductor chip being an object to be analyzed based on a power current waveform, which is obtained by simulation of the semiconductor chip based on design data of the semiconductor chip. The analysis portion carries out a noise analysis of a power system including a board having the semiconductor chip mounted thereon based on the internal impedance.
Claims9
A power source noise analysis device comprising:
- an analysis portion that estimates an internal impedance of a semiconductor chip being an object to be analyzed based on a power current waveform, which is obtained by a simulation of the semiconductor chip based on design data of the semiconductor chip, and carries out a noise analysis of a power system including a board having the semiconductor chip mounted thereon based on the internal impedance.
A method for analyzing power source noise, comprising:
- generating a power current waveform by simulation of a semiconductor chip being an object to be analyzed, based on design data of the semiconductor chip;
- estimating an internal impedance of the semiconductor chip based on the power current waveform;
- and
- carrying out a noise analysis of a power system including a board having the semiconductor chip mounted thereon based on the internal impedance.
1 more element
Dependencies are inferred from the claim text.