Method and system for analyzing performance metrics of array type circuits under process variability

A system for analyzing a performance metric of an array type electronic circuit under process variability effects, the electronic circuit comprising an array with a plurality of array elements, an access path being a model of the electronic circuit, the model comprising building blocks containing all hardware to access one array element in the array, each building block comprising at least one basic element, the system comprising:

• first calculation means arranged for deriving statistics of the access path due to variations in the building blocks under process variability of the basic elements;
• and
• second calculation means arranged for deriving statistics of the full electronic circuit by combining the results of the statistics of the access path under awareness of the array architecture.

A system for analyzing a performance metric of an array type electronic circuit under process variability effects, the electronic circuit comprising an array with a plurality of array elements, an access path being a model of the electronic circuit, the model comprising building blocks containing all hardware to access one array element in the array, each building block comprising at least one basic element, the system comprising:

• a first calculation module configured to derive statistics of the access path due to variations in the building blocks under process variability of the basic elements;
• and
• a second calculation module configured to derive statistics of the full electronic circuit by combining the results of the statistics of the access path under awareness of the array architecture.