METHOD FOR FORMING A HIGH-k GATE STACK WITH REDUCED EFFECTIVE OXIDE THICKNESS
AssigneeTokyo Electron Limited
InventorRobert D. Clark
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AssigneeTokyo Electron Limited
InventorRobert D. Clark
Estimating the term…
A method is provided for forming a high-k gate stack with a reduced effective oxide thickness (EOT) for a semiconductor device. The method includes providing a silicon-containing substrate, forming an interface layer on the silicon-containing substrate, where the interface layer has a first equivalent oxide thickness, depositing a first high-k film on the interface layer, and heat-treating the first high-k film and the interface layer at a temperature that forms a modified interface layer, where the modified interface layer has a second equivalent oxide thickness that is equal to or lower than the first equivalent oxide thickness. The method further includes depositing a second high-k film on the modified interface layer. According to one embodiment, the first high-k film includes lanthanum oxide and the second high-k film includes hafnium silicate.
A method for forming a gate dielectric film stack, the method comprising:
A method for forming a gate dielectric stack, the method comprising:
A method for forming a gate dielectric stack, the method comprising:
Dependencies are inferred from the claim text.