Method of making chip-on-lead package
AssigneeFreescale Semiconductor, Inc.
InventorsZhe Li, Qingchun He, Guanhua Wang, Zhijie Wang, Nan Xu
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AssigneeFreescale Semiconductor, Inc.
InventorsZhe Li, Qingchun He, Guanhua Wang, Zhijie Wang, Nan Xu
Estimating the term…
A process for assembling a Chip-On-Lead packaged semiconductor device includes the steps of: mounting and sawing a wafer to provide individual semiconductor dies; performing a first molding operation on a lead frame; depositing epoxy on the lead frame via a screen printing process; attaching one of the singulated dies on the lead frame with the epoxy, where the die attach is done at room temperature; and curing the epoxy in an oven. Throughput improvements may be ascribed to not including a hot die attach process. An optional plasma cleaning step may be performed, which greatly improves wire bonding quality and a second molding quality. In addition, since a first molding operation is performed before the formation of epoxy to avoid the problem of the epoxy hanging in the air, the delamination risk between the epoxy and the die is avoided.
A method of forming a Chip-On-Lead package, comprising the steps of:
A method of forming a Chip-On-Lead package, comprising the steps of:
A method of forming a Chip-On-Lead package, comprising the steps of:
Dependencies are inferred from the claim text.